Testing a relatively complex circuit presents a number of challenges and trade-offs. One such challenge is getting a microprocessor under test conditions and exercising it and associated circuitry under as realistic conditions as possible, while still keeping the cost of test circuitry low and having a minimum impact on non-testing circuitry.
One conventional solution is to program a memory with test instructions and then cycle them through the microprocessor in test mode. This may lead to fairly realistic test conditions. Unfortunately, programming the memory may be time consuming. Furthermore, this technique requires a dedicated area of memory, which is undesirable on a chip with limited memory and may increase cost.
A further problem is the inherent limitations of a pre-programmed test sequence. In order to adequately test the circuit, it may be necessary to develop a very complex testing sequence. Undesirably, this may require more memory to be used. Furthermore, a preprogrammed test sequence may fail to adequately test the circuit. For example, if the test is inadequate it is very difficult or impossible to properly test the circuit as a test sequence burned into memory may not be changed.
Some conventional methods negatively impact non-testing circuitry, such as a program memory, by writing the test program over this memory. Unfortunately, this makes it more difficult to get in and out of test mode.
Therefore, it would be advantageous to provide a method which allows testing a circuit under realistic conditions. It would be further advantageous to provide such a method which does not require time consuming programming. It would be advantageous to provide such a method for testing a circuit which is cost effective. Finally, it would be advantageous to provide for such a method which allows easy switching between test mode and normal mode.